FreescaleQE128血压计参考设计方案  2012/3/1

         Freescale公司的血压计(BPM)参考设计采用MC9S08QE128作为微控制器,具有控制,数据保持,模拟采集和连接功能以及能和用户接口. 参考设计具有多种优势:采用MC9S08JM60作为USB通信的桥,采用MC13202 ZigBee收发器进行2.4GHz通信,采用MRAM来存储用户数据和通信,MRAM驱动器能存取MRAM存储器,采用OLED作为用户显示, MPR083接近式传感器用作用户接口,以及用两个定时PWM模块作为音频反馈.本文首先介绍了MC9S08QE128主要特性和方框图.接着介绍了血压计(BPM)参考设计的硬件方框图和软件架构流程图,以及详细电路图和所用材料清单.

MC9S08QE128主要特性:

• 8-Bit HCS08 Central Processor Unit (CPU)

– Up to 50.33-MHz HCS08 CPU above 2.4V, 40-MHz CPU above 2.1V, and 20-MHz CPU above 1.8V, across temperature range

– HC08 instructionsetwith added BGND instruction

– Support for up to 32 interrupt/reset sources

• On-Chip Memory

– Flash read/program/erase over full operating voltage and temperature

– Random-access memory (RAM)

– Security circuitry to prevent unauthorized access to RAM and flash contents

• Power-Saving Modes

– Two low power stop modes; reduced power wait mode

– Peripheral clock enable register can disable clocks to unused modules, reducing currents; allows clocks to remain enabled to specific peripherals in stop3 mode

– Very low power external oscillator can be used in stop3 mode to provide accurate clock to active peripherals

– Very low power real time counter for use in run, wait, and stop modes with internal and external clock sources

– 6 μs typical wake up time from stop modes

• Clock Source Options

– Oscillator (XOSC) — Loop-control Pierce oscillator; Crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz

– Internal Clock Source (ICS) — FLL controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation; supports CPU freq. from 2 to 50.33 MHz

• System Protection

– Watchdog computer operating properly (COP) reset with option to run from dedicated 1-kHz internal clock source or bus clock

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